Generally, data retention time, indicating the duration of time that stored data is preserved in a floating gate is one of the most important factor in a flash EEPROM device. Loss of data stored in the floating gate occurs when the data is read at which time a positive bias is applied to the control gate; that is, such loss of stored data occurs by an injection of the holes which are moved from the control gate to a dielectric layer and by a leakage of a current which flowed to a tunnel oxide.
What is more, a high capacitance coupling ratio is needed between a control gate and a floating gate of a flash EEPROM device. Therefore, in the flash EEPROM fabrication process, an interpoly dielectric layer having a three layer structure formed of a bottom oxide layer, a nitride layer and a top oxide layer (hereinafter, referred to as "ONO") is necessary instead of an oxide layer. However, since the nitride layer has a small band gap, the data retention time is reduced by an injection of the holes moved from the control gate if the top oxide layer is thin. Moreover, since the oxide layer does not grow more than 10 .ANG. on the nitride layer by the thermal oxidation, the Chemical Vapor Deposition(CVD) method is needed to form the top oxide layer. However, it is difficult to apply this method in the flash EEPROM fabrication process and a thick dielectric layer reduces the capacitance coupling ratio, therefore reducing the performance of the device.